Unit 1: Introduction




Introduction to Digital Systems

A digital system is an electronic system that processes information in binary form (0 and 1). Examples include computers, calculators, mobile phones, and embedded systems.
A digital system is made up of several functional units that work together to receive input, process data, store information, and produce output.

Functional Units of a Digital System

A digital system mainly consists of the following functional units:

Input Unit

  • Accepts data and instructions from the user or external devices.
  • Converts input into binary form.
  • Examples: Keyboard, mouse, scanner.

Output Unit

  • Displays or produces results after processing.
  • Converts binary output into human-readable form.
  • Examples: Monitor, printer, speaker.

Memory Unit

  • Stores data, instructions, and results.

Two types:

  • Primary Memory: RAM, ROM
  • Secondary Memory: Hard disk, SSD

Central Processing Unit (CPU)

The CPU is the brain of the digital system. It performs all calculations and decision-making tasks.

The CPU consists of:

Arithmetic Logic Unit (ALU)

  • Performs arithmetic operations (addition, subtraction, etc.)
  • Performs logical operations (AND, OR, NOT, comparisons

Control Unit (CU)

  • Controls and coordinates all operations
  • Sends control signals to memory and I/O devices

Registers

  • Small, high-speed storage inside the CPU
  • Stores temporary data, instructions, and addresses

Interconnection of Functional Units

All functional units are interconnected using a bus system.
The bus system allows data, address, and control information to flow between units.

Bus System

A bus is a set of parallel wires (lines) used to transfer data and signals between different components of a digital system.

Why Bus is Needed?

  • Reduces wiring complexity
  • Allows multiple devices to communicate
  • Improves system organization

Bus Architecture

Bus architecture defines how different system components are connected and communicate through buses.

Main Components of Bus Architecture:

  1. Bus Lines
  2. Bus Controller
  3. Bus Master and Slave Devices

Types of Buses

Data Bus

  • Transfers actual data
  • Bidirectional
  • Width (8-bit, 16-bit, 32-bit, 64-bit) determines data transfer speed

Address Bus

  • Transfers memory addresses
  • Unidirectional (from CPU to memory/I/O)
  • Determines maximum memory capacity

Control Bus

  • Transfers control signals

Examples:

  • Read
  • Write
  • Interrupt
  • Clock signals

Summary Table: Types of Buses

Bus TypeFunctionDirection
Data BusTransfers dataBidirectional
Address BusTransfers addressUnidirectional
Control BusTransfers control signalsBoth

Bus Arbitration

What is Bus Arbitration?

Bus arbitration is the process of deciding which device gets control of the bus when multiple devices request it simultaneously.

Why It Is Needed?

  • Only one device can use the bus at a time
  • Prevents data collision

Types of Bus Arbitration

Centralized Arbitration

  • A single bus arbiter controls bus access
  • Simple and cost-effective

Types:

Daisy Chaining

  • Devices connected in series
  • Priority based on position

Parallel Arbitration

  • Each device has a separate request line
  • Faster but costly

Distributed Arbitration

  • No central arbiter
  • Each device has arbitration logic
  • More reliable but complex

Registers

A register is a small, fast storage location inside the CPU used to store data temporarily.

Types of Registers

  • Accumulator
  • Program Counter (PC)
  • Instruction Register (IR)
  • Memory Address Register (MAR)
  • Memory Data Register (MDR)

Register Transfer

Register transfer refers to the movement of data from one register to another.

Example:

R1 ← R2

Meaning: Data from register R2 is transferred to register R1.

Register Transfer Language (RTL)

Used to describe internal operations of CPU.

Bus Transfer

Bus transfer occurs when data is transferred between components using a common bus.

Steps in Bus Transfer:

  1. Source places data on bus
  2. Destination reads data
  3. Control signals manage the operation

Memory Transfer

Memory Read Operation

  1. CPU sends address to memory
  2. Control unit issues READ signal
  3. Data is transferred to CPU register

Memory Write Operation

  1. CPU sends address and data
  2. Control unit issues WRITE signal
  3. Data is stored in memory

Conclusion

A digital system is composed of multiple functional units connected through a bus system.
Efficient bus architecture and arbitration techniques ensure smooth communication between components.
Registers and memory transfers play a crucial role in achieving high-speed data processing.

Processor Organization

Processor organization refers to the internal structure of the CPU and the way data and instructions are stored, accessed, and processed.
It mainly focuses on:

  • How registers are arranged
  • How operands are accessed
  • How instructions operate on data

The efficiency of a processor largely depends on its organization.

Types of Processor Organization

Based on how operands are stored and accessed, processor organization is mainly classified into:

  1. General Register Organization
  2. Stack Organization
  3. Accumulator Organization (for reference)

This explanation focuses on general register organization, stack organization, and addressing modes.

General Register Organization

In general register organization, the CPU contains a set of general-purpose registers.
These registers are used to store:

  • Data
  • Operands
  • Intermediate results
  • Addresses

Most modern processors use this organization.

Structure of General Register Organization

Components:

  • Register file (collection of registers)
  • ALU
  • Control unit
  • Multiplexers to select registers

Registers are usually named:

  • R0, R1, R2, … Rn

Instruction Format

An instruction may specify:

  • Two source registers
  • One destination register

Example:

ADD R1, R2, R3

Meaning:

R1 ← R2 + R3

Advantages

  • Fast access (registers are inside CPU)
  • Fewer memory accesses
  • High execution speed
  • Flexible instruction format

Disadvantages

  • More hardware required
  • Complex control unit
  • Costly compared to accumulator organization

Stack Organization

In stack organization, the processor uses a stack to store operands and intermediate results.

A stack follows:
LIFO (Last In, First Out) principle.

Stack Structure

  • Operands are not explicitly named
  • Instructions operate on top elements of the stack
  • A special register called Stack Pointer (SP) holds the address of the top of the stack

Stack Operations

  1. PUSH - Adds an element to the top of the stack
  2. POP - Removes an element from the top of the stack

Example of Stack Operation

Expression:

A + B

Steps:

  1. PUSH A
  2. PUSH B
  3. ADD

Result is stored at the top of the stack.

Instruction Format

Zero-address instructions are commonly used.

Example:

ADD

Meaning:

  • Pop top two operands
  • Add them
  • Push result back to stack

Advantages

  • Simple instruction format
  • No need to specify operand addresses
  • Efficient for expression evaluation

Disadvantages

  • Difficult to access non-top elements
  • Not efficient for complex programs
  • Slower than register organization

Addressing Modes

Meaning of Addressing Modes

An addressing mode specifies how the address of an operand is obtained by the CPU.

Different addressing modes provide flexibility and reduce instruction size.

Types of Addressing Modes

Immediate Addressing Mode

  • Operand is directly included in the instruction

Example:

MOV R1, #10

Advantage:

  • Fast execution

Disadvantage:

  • Limited operand size

Direct Addressing Mode

  • Instruction contains the memory address of the operand

Example:

LOAD R1, 1000

Indirect Addressing Mode

  • Instruction specifies a memory location that contains the address of the operand

Example:

LOAD R1, @1000

Register Addressing Mode

  • Operand is stored in a register

Example:

ADD R1, R2

Register Indirect Addressing Mode

  • Register contains the address of the operand

Example:

LOAD R1, (R2)

Indexed Addressing Mode

  • Effective address = Base address + Index value

Example:

LOAD R1, 1000(R2)

Used in:

  • Arrays
  • Tables

Relative Addressing Mode

  • Effective address = Program Counter + offset

Used in:

  • Branch instructions

Example:

BEQ LABEL

Stack Addressing Mode

  • Operand is at the top of the stack
  • Used in stack-organized processors

Comparison Table

Processor Organization

FeatureGeneral RegisterStack Organization
Operand storageRegistersStack
Instruction lengthLongerShort
SpeedHighMedium
Hardware complexityHighLow

Addressing Modes Summary

Addressing ModeOperand Location
ImmediateIn instruction
DirectMemory
IndirectMemory via pointer
RegisterCPU register
Register IndirectAddress in register
IndexedBase + index
RelativePC + offset
StackTop of stack

Conclusion

Processor organization determines how efficiently a CPU executes instructions.

  • General register organization offers high speed and flexibility.
  • Stack organization simplifies instruction design but limits access.
  • Addressing modes provide multiple ways to locate operands efficiently.